DSPI.h File Reference

Serial Peripheral Interface drivers. More...

Go to the source code of this file.

Data Structures
union	DSPIInstance_t
union	DSPIPresetConfig_t
union	DSPIConfig_t
Defines
#define	TRUE   (1u)
#define	CLEAR   (0u)
#define	BITS_IN_NIBBLE   (4u)
#define	BITS_IN_BYTE   (8u)
#define	BITS_IN_32   (32u)
#define	BITS_IN_16   (16u)
#define	BYTES_IN_32   (4u)
#define	BYTES_IN_16   (2u)
#define	BIT_DEFINITION
#define	BIT0   (1u << 0u)
#define	BIT1   (1u << 1u)
#define	BIT2   (1u << 2u)
#define	BIT3   (1u << 3u)
#define	BIT4   (1u << 4u)
#define	BIT5   (1u << 5u)
#define	BIT6   (1u << 6u)
#define	BIT7   (1u << 7u)
#define	BIT8   (1u << 8u)
#define	BIT9   (1u << 9u)
#define	BIT10   (1u << 10)
#define	BIT11   (1u << 11)
#define	BIT12   (1u << 12)
#define	BIT13   (1u << 13)
#define	BIT14   (1u << 14)
#define	BIT15   (1u << 15)
#define	BIT16   (1u << 16)
#define	BIT17   (1u << 17)
#define	BIT18   (1u << 18)
#define	BIT19   (1u << 19)
#define	BIT20   (1u << 20)
#define	BIT21   (1u << 21)
#define	BIT22   (1u << 22)
#define	BIT23   (1u << 23)
#define	BIT24   (1u << 24)
#define	BIT25   (1u << 25)
#define	BIT26   (1u << 26)
#define	BIT27   (1u << 27)
#define	BIT28   (1u << 28)
#define	BIT29   (1u << 29)
#define	BIT30   (1u << 30)
#define	BIT31   (1u << 31)
#define	N_DSPI_PRESETS   (8u)
#define	N_DSPI_INSTANCES   (4u)
#define	DSPI0C0   (0x00)
#define	DSPI0C1   (0x01)
#define	DSPI0C2   (0x02)
#define	DSPI0C3   (0x03)
#define	DSPI0C4   (0x04)
#define	DSPI0C5   (0x05)
#define	DSPI0C6   (0x06)
#define	DSPI0C7   (0x07)
#define	DSPI1C0   (0x10)
#define	DSPI1C1   (0x11)
#define	DSPI1C2   (0x12)
#define	DSPI1C3   (0x13)
#define	DSPI1C4   (0x14)
#define	DSPI1C5   (0x15)
#define	DSPI1C6   (0x16)
#define	DSPI1C7   (0x17)
#define	DSPI2C0   (0x20)
#define	DSPI2C1   (0x21)
#define	DSPI2C2   (0x22)
#define	DSPI2C3   (0x23)
#define	DSPI2C4   (0x24)
#define	DSPI2C5   (0x25)
#define	DSPI2C6   (0x26)
#define	DSPI2C7   (0x27)
#define	DSPI3C0   (0x30)
#define	DSPI3C1   (0x31)
#define	DSPI3C2   (0x32)
#define	DSPI3C3   (0x33)
#define	DSPI3C4   (0x34)
#define	DSPI3C5   (0x35)
#define	DSPI3C6   (0x36)
#define	DSPI3C7   (0x37)
#define	DSPI_CPOL_SET   (0x80000000u)
#define	DSPI_CPOL_CLEAR   (0x00000000u)
#define	DSPI_CPHA_SET   (0x40000000u)
#define	DSPI_CPHA_CLEAR   (0x00000000u)
#define	DSPI_LSB_FIRST   (0x20000000u)
#define	DSPI_MSB_FIRST   (0x00000000u)
#define	DSPI_16_BIT   (0x1E000000u)
#define	DSPI_9_BIT   (0x10000000u)
#define	DSPI_8_BIT   (0x0E000000u)
#define	DSPI_DBR_SET   (0x01000000u)
#define	DSPI_DBR_CLEAR   (0x00000000u)
#define	DSPI_BRP_0   (0x00000000u)
#define	DSPI_BRP_1   (0x00400000u)
#define	DSPI_BRP_2   (0x00800000u)
#define	DSPI_BRP_3   (0x00C00000u)
#define	DSPI_BR_0   (0x00000000u)
#define	DSPI_BR_1   (0x00040000u)
#define	DSPI_BR_2   (0x00080000u)
#define	DSPI_BR_3   (0x000C0000u)
#define	DSPI_BR_4   (0x00100000u)
#define	DSPI_BR_5   (0x00140000u)
#define	DSPI_BR_6   (0x00180000u)
#define	DSPI_BR_7   (0x001C0000u)
#define	DSPI_BR_8   (0x00200000u)
#define	DSPI_BR_9   (0x00240000u)
#define	DSPI_BR_A   (0x00280000u)
#define	DSPI_BR_B   (0x002C0000u)
#define	DSPI_BR_C   (0x00300000u)
#define	DSPI_BR_D   (0x00340000u)
#define	DSPI_BR_E   (0x00380000u)
#define	DSPI_BR_F   (0x003C0000u)
#define	DSPI_PCSSCK_00   (0x00000000u)
#define	DSPI_PCSSCK_01   (0x00010000u)
#define	DSPI_PCSSCK_10   (0x00020000u)
#define	DSPI_PCSSCK_11   (0x00030000u)
#define	DSPI_CCSCK_0   (0x00000000u)
#define	DSPI_CCSCK_1   (0x00001000u)
#define	DSPI_CCSCK_2   (0x00002000u)
#define	DSPI_CCSCK_3   (0x00003000u)
#define	DSPI_CCSCK_4   (0x00004000u)
#define	DSPI_CCSCK_5   (0x00005000u)
#define	DSPI_CCSCK_6   (0x00006000u)
#define	DSPI_CCSCK_7   (0x00007000u)
#define	DSPI_CCSCK_8   (0x00008000u)
#define	DSPI_CCSCK_9   (0x00009000u)
#define	DSPI_CCSCK_A   (0x0000A000u)
#define	DSPI_CCSCK_B   (0x0000B000u)
#define	DSPI_CCSCK_C   (0x0000C000u)
#define	DSPI_CCSCK_D   (0x0000D000u)
#define	DSPI_CCSCK_E   (0x0000E000u)
#define	DSPI_CCSCK_F   (0x0000F000u)
#define	DSPI_PDT_00   (0x00000000u)
#define	DSPI_PDT_01   (0x40000000u)
#define	DSPI_PDT_10   (0x80000000u)
#define	DSPI_PDT_11   (0xC0000000u)
#define	DSPI_DT_0   (0x00000000u)
#define	DSPI_DT_1   (0x04000000u)
#define	DSPI_DT_2   (0x08000000u)
#define	DSPI_DT_3   (0x0C000000u)
#define	DSPI_DT_4   (0x10000000u)
#define	DSPI_DT_5   (0x14000000u)
#define	DSPI_DT_6   (0x18000000u)
#define	DSPI_DT_7   (0x1C000000u)
#define	DSPI_DT_8   (0x20000000u)
#define	DSPI_DT_9   (0x24000000u)
#define	DSPI_DT_A   (0x28000000u)
#define	DSPI_DT_B   (0x2C000000u)
#define	DSPI_DT_C   (0x30000000u)
#define	DSPI_DT_D   (0x34000000u)
#define	DSPI_DT_E   (0x38000000u)
#define	DSPI_DT_F   (0x3C000000u)
#define	DSPI_PASC_00   (0x00000000u)
#define	DSPI_PASC_01   (0x01000000u)
#define	DSPI_PASC_10   (0x02000000u)
#define	DSPI_PASC_11   (0x03000000u)
#define	DSPI_ASC_0   (0x00000000u)
#define	DSPI_ASC_1   (0x00100000u)
#define	DSPI_ASC_2   (0x00200000u)
#define	DSPI_ASC_3   (0x00300000u)
#define	DSPI_ASC_4   (0x00400000u)
#define	DSPI_ASC_5   (0x00500000u)
#define	DSPI_ASC_6   (0x00600000u)
#define	DSPI_ASC_7   (0x00700000u)
#define	DSPI_ASC_8   (0x00800000u)
#define	DSPI_ASC_9   (0x00900000u)
#define	DSPI_ASC_A   (0x00A00000u)
#define	DSPI_ASC_B   (0x00B00000u)
#define	DSPI_ASC_C   (0x00C00000u)
#define	DSPI_ASC_D   (0x00D00000u)
#define	DSPI_ASC_E   (0x00E00000u)
#define	DSPI_ASC_F   (0x00F00000u)
#define	DSPI_DISABLE   (0x80000000u)
#define	DSPI_ENABLE   (0x00000000u)
#define	DSPI_IS_MASTER   (0x40000000u)
#define	DSPI_IS_SLAVE   (0x00000000u)
#define	DSPI_CONT_CLK_EN   (0x20000000u)
#define	DSPI_CONT_CLK_DIS   (0x00000000u)
#define	DSPI_TX_FIFO_DIS   (0x10000000u)
#define	DSPI_TX_FIFO_EN   (0x00000000u)
#define	DSPI_RX_FIFO_DIS   (0x08000000u)
#define	DSPI_RX_FIFO_EN   (0x00000000u)
#define	DSPI_TX_ISR_EN   (0x04000000u)
#define	DSPI_TX_ISR_DIS   (0x00000000u)
#define	DSPI_TX_DMA_EN   (0x02000000u)
#define	DSPI_TX_DMA_DIS   (0x00000000u)
#define	DSPI_RX_ISR_EN   (0x01000000u)
#define	DSPI_RX_ISR_DIS   (0x00000000u)
#define	DSPI_RX_DMA_EN   (0x00800000u)
#define	DSPI_RX_DMA_DIS   (0x00000000u)
#define	DSPI_CS7_INVERT_EN   (0x00400000u)
#define	DSPI_CS7_INVERT_DIS   (0x00000000u)
#define	DSPI_CS6_INVERT_EN   (0x00200000u)
#define	DSPI_CS6_INVERT_DIS   (0x00000000u)
#define	DSPI_CS5_INVERT_EN   (0x00100000u)
#define	DSPI_CS5_INVERT_DIS   (0x00000000u)
#define	DSPI_CS4_INVERT_EN   (0x00080000u)
#define	DSPI_CS4_INVERT_DIS   (0x00000000u)
#define	DSPI_CS3_INVERT_EN   (0x00040000u)
#define	DSPI_CS3_INVERT_DIS   (0x00000000u)
#define	DSPI_CS2_INVERT_EN   (0x00020000u)
#define	DSPI_CS2_INVERT_DIS   (0x00000000u)
#define	DSPI_CS1_INVERT_EN   (0x00010000u)
#define	DSPI_CS1_INVERT_DIS   (0x00000000u)
#define	DSPI_CS0_INVERT_EN   (0x00008000u)
#define	DSPI_CS0_INVERT_DIS   (0x00000000u)
#define	DSPI_MODIFIED_TIME_DIS   (0x00000000u)
#define	DSPI_DELAY_POST_TRANSFER   (4u)
#define	DSPI_PDT_DEFAULT   (3u)
#define	DSPI_DELAY_AFTER_SCK   (2u)
#define	DSPI_PRESCALER_AFTER_SCK   (1u)
#define	DSPI_SR_TXRXS_MASK   ((uint32_t)BIT28)
#define	DSPI_FIFO_BUFFER_DEPTH   (5u)
#define	PUSHR_EOQ_MASK   ((uint32_t)BIT27)
#define	DSPI_FULL_TRANSFER_BITS   (16u)
#define	DSPI_ENABLE_DMA_DISABLE_ISR   (0x01u)
#define	DSPI_DISABLE_DMA_ENABLE_ISR   (0x00u)
#define	FORMAT_PUSHR(XX, YY, ZZ, AA, BB)
Typedefs
typedef struct DSPI_tag *	DSPI_t
Enumerations
enum	INSTANCE_INDEX {   INDEX_I0C0 = 0, INDEX_I0C1, INDEX_I0C2, INDEX_I0C3,   INDEX_I0C4, INDEX_I0C5, INDEX_I0C6, INDEX_I0C7,   INDEX_I1C0, INDEX_I1C1, INDEX_I1C2, INDEX_I1C3,   INDEX_I1C4, INDEX_I1C5, INDEX_I1C6, INDEX_I1C7,   INDEX_I2C0, INDEX_I2C1, INDEX_I2C2, INDEX_I2C3,   INDEX_I2C4, INDEX_I2C5, INDEX_I2C6, INDEX_I2C7,   INDEX_I3C0, INDEX_I3C1, INDEX_I3C2, INDEX_I3C3,   INDEX_I3C4, INDEX_I3C5, INDEX_I3C6, INDEX_I3C7 }
enum	DSPI_STATUS { DSPI_STATUS_CLEAR = 0u, DSPI_BUSY_WITH_PREVIOUS_TX, DSPI_NOT_HALTED }
Functions
uint8_t	u8fnDSPITranscieve (const uint8_t u8MyInstance, const uint8_t u8CSEnable, uint16_t *pu16DSPITx, uint16_t *pu16DSPIRx, const uint8_t u8Size)
	This routine will, once the corresponding DSPI instance has been configured, send and receive any number of words through interrupts. Note that this means that at the exit of this routine, the message might still be ongoing.
uint32_t	u32fnDSPIStatus (uint8_t u8Instance)
	This routine returns the status register for a given instance.
void	vfnDSPIEnable (const DSPIInstance_t tMyInstance, const uint8_t u8CSEnable, const uint8_t u8Start)
	Enables or disables a particular DSPI transmission. used by u8fnDSPITranscieve.
uint8_t	u8fnConfigDSPIGeneral (const DSPIConfig_t *tDSPIConfig)
	Configures a particular DSPI instance with general settings on how it is to be used.
uint8_t	u8fnConfigDSPIPreset (const DSPIPresetConfig_t *tDSPIConfig)
	This routine will configure a particular preset configuration within an SPI instance.
uint8_t	u8fnIsDSPIBusy (uint8_t u8Instance)
	returns DSPI_BUSY_WITH_PREVIOUS_TX based on the state of HW bit SPI HALT
uint32_t	u32fnFormatDSPIPUSHR (uint8_t u8DSPIInstance, uint8_t u8CS, uint8_t u8ContCS, uint8_t u8EndOfQueueFlag, uint16_t u16Msg)
	Formats a 16-bit word for placement in PUSHR and transmission.
uint8_t	u8fnDSPISwitchIsrMode (uint8_t u8DSPIInstance, uint8_t u8IsrMode)
	Switches between Interrupt-enabled SPI and DMA-enabled SPI.
void	vfnDSPI0FUFISR (void)
	DSPI0's interrupt vector for the FUF flag. It calls a generic routine.
void	vfnDSPI1FUFISR (void)
	DSPI1's interrupt vector for the FUF flag. It calls a generic routine.
void	vfnDSPI2FUFISR (void)
	DSPI2's interrupt vector for the FUF flag. It calls a generic routine.
void	vfnDSPI3FUFISR (void)
	DSPI3's interrupt vector for the FUF flag. It calls a generic routine.
void	vfnDSPI0TCFIsr (void)
	DSPI0's interrupt vector for the Transmission Complete flag. It calls a generic routine.
void	vfnDSPI1TCFIsr (void)
	DSPI1's interrupt vector for the Transmission Complete flag. It calls a generic routine.
void	vfnDSPI2TCFIsr (void)
	DSPI2's interrupt vector for the Transmission Complete flag. It calls a generic routine.
void	vfnDSPI3TCFIsr (void)
	DSPI3's interrupt vector for the Transmission Complete flag. It calls a generic routine.
void	vfnDSPI0EOQIsr (void)
	DSPI0's interrupt vector for the End-ofQue flag. It calls a generic routine.
void	vfnDSPI1EOQIsr (void)
	DSPI1's interrupt vector for the End-ofQue flag. It calls a generic routine.
void	vfnDSPI2EOQIsr (void)
	DSPI2's interrupt vector for the End-ofQue flag. It calls a generic routine.
void	vfnDSPI3EOQIsr (void)
	DSPI3's interrupt vector for the End-ofQue flag. It calls a generic routine.
void	vfnDSPI0RFDFIsr (void)
	DSPI0's interrupt vector for the RFDF flag. It calls a generic routine.
void	vfnDSPI1RFDFIsr (void)
	DSPI1's interrupt vector for the RFDF flag. It calls a generic routine.
void	vfnDSPI2RFDFIsr (void)
	DSPI2's interrupt vector for the RFDF flag. It calls a generic routine.
void	vfnDSPI3RFDFIsr (void)
	DSPI3's interrupt vector for the RFDF flag. It calls a generic routine.
void	vfnDSPI0TFFFIsr (void)
	DSPI0's interrupt vector for the TFFF flag. It calls a generic routine.
void	vfnDSPI1TFFFIsr (void)
	DSPI1's interrupt vector for the TFFF flag. It calls a generic routine.
void	vfnDSPI2TFFFIsr (void)
	DSPI2's interrupt vector for the TFFF flag. It calls a generic routine.
void	vfnDSPI3TFFFIsr (void)
	DSPI3's interrupt vector for the TFFF flag. It calls a generic routine.
Variables
const uint8_t	cau8DSPIInstances [N_DSPI_INSTANCES *N_DSPI_PRESETS]
const DSPI_t	catDSPIInstances [N_DSPI_INSTANCES]
vuint8_t	gau8DSPIBuffSize [N_DSPI_INSTANCES]
vuint8_t	gau8DSPIWordsRx [N_DSPI_INSTANCES]
vuint8_t	gau8DSPITransferSize [N_DSPI_INSTANCES]
vuint8_t	gau8DSPITxFIFOIsEnabled [N_DSPI_INSTANCES]
vuint8_t	gau8DSPIRxFIFOIsEnabled [N_DSPI_INSTANCES]
vuint16_t *	gpu16DSPITxBuffer [N_DSPI_INSTANCES]
vuint16_t *	gpu16DSPIRxBuffer [N_DSPI_INSTANCES]
vuint8_t *	gpu8DSPITxBuffer [N_DSPI_INSTANCES]
vuint8_t *	gpu8DSPIRxBuffer [N_DSPI_INSTANCES]

---

Detailed Description

Serial Peripheral Interface drivers.

Copyright (c) 2011 Freescale Semiconductor Freescale Confidential Proprietary

Author:

Freescale Semiconductor

SASD Automotive

R11515

Version:

Date:

Warning:

(If needed)

History:

---

Define Documentation

#define FORMAT_PUSHR	(		XX,
			YY,
			ZZ,
			AA,
			BB
	)

Value:

((uint32_t)BB | (uint32_t)(YY << 16u) | \
      (uint32_t)((XX & 0x0Fu) << 28u) | (uint32_t)(ZZ << 31u) | \
      (uint32_t)((AA & 0x01) << 27u))

---

Function Documentation

uint32_t u32fnDSPIStatus

(

uint8_t

u8Instance

)

This routine returns the status register for a given instance.

Parameters:

u8MyInstance,:

8-bit word with the correct instance (0 - 3 for Pictus).

Returns:

Status word as defined by HW:

• BIT31: Transfer complete flag
• BIT30: Tx/Rx enabled (when 1)
• BIT28: End of queue flag
• BIT27: Transmit FIFO underflow flag
• BIT25: Transmit FIFO fill flag
• BIT19: Receive FIFO overflow flag
• BIT18: Receive FIFO drain flag
• BIT15:12: Tx FIFO counter (counts elements in FIFO)
• BIT11:8: Next FIFO element to be sent
• BIT7:4: Rx FIFO counter (counts elements in the FIFO)
• BIT3:0: Next FIFO element to be read

uint32_t u32fnFormatDSPIPUSHR	(	uint8_t	u8DSPIInstance,
		uint8_t	u8CS,
		uint8_t	u8ContCS,
		uint8_t	u8EndOfQueueFlag,
		uint16_t	u16Msg
	)

Formats a 16-bit word for placement in PUSHR and transmission.

Parameters:

u8DSPIInstance,:	A combination of SPI instance and CTAR. Only CTAR is used.
u8CS,:	Mask to the active chip select.
u8ContCS,:	1 if chip select should be continuous with next word, 0 otherwise.
u8EndOfQueueFlag,:	1 if the EndOfQueue should be set at the end of the transmission, possibly generating and EOQ interrupt, 0 otherwise.
u16Msg,:	the 16-bit word to be added to the register.

Returns:

32-bit PUSHR register.

uint8_t u8fnConfigDSPIGeneral

(

const DSPIConfig_t *

tDSPIConfig

)

Configures a particular DSPI instance with general settings on how it is to be used.

Parameters:

tDSPIConfig,:

Structure with Instance and configuration to be used.

Returns:

DSPI_NOT_HALTED if we are not allowed to configure, zero otherwise

uint8_t u8fnConfigDSPIPreset

(

const DSPIPresetConfig_t *

tDSPIConfig

)

This routine will configure a particular preset configuration within an SPI instance.

Parameters:

tDSPIConfig,:

Pointer to a structure containing the preset config.

Returns:

u8Status: Always CLEAR

uint8_t u8fnDSPISwitchIsrMode	(	uint8_t	u8DSPIInstance,
		uint8_t	u8IsrMode
	)

Switches between Interrupt-enabled SPI and DMA-enabled SPI.

Parameters:

u8DSPIInstance,:	0 - 3, depending on which SPI instance will be used.
u8IsrMode,:	DSPI_ENABLE_DMA_DISABLE_ISR or DSPI_DISABLE_DMA_ENABLE_ISR

Returns:

u8Status: Always CLEAR.

uint8_t u8fnDSPITranscieve	(	const uint8_t	u8MyInstance,
		const uint8_t	u8CSEnable,
		uint16_t *	pu16DSPITx,
		uint16_t *	pu16DSPIRx,
		const uint8_t	u8Size
	)

This routine will, once the corresponding DSPI instance has been configured, send and receive any number of words through interrupts. Note that this means that at the exit of this routine, the message might still be ongoing.

Parameters:

u8MyInstance,:	8-bit word containing both the DSPI instance and the preset configuration to be used, using the format defined in DSPIInstance_t.
u8CSEnable,:	Selects which Chip Select will be used. Bit dependant: BIT0 = CS0, BIT1 = CS1 and so on...
pu16DSPITx,:	Pointer to Buffer to be transmitted. Note that buffers containing 8-bit words will be handled accordingly, but must be cast explicitly to 16-bit pointers to call the routine.
pu16DSPIRx,:	Pointer to buffer where data will be received. Note that buffers containing 8-bit words will be handled accordingly, but must be cast explicitly to 16-bit pointers to call the routine
u8Size,:	Size of buffer to be transmitted.

Returns:

u8Status: Zero if no problems found; DSPI_BUSY_WITH_PREVIOUS_TX if the HW is busy and cannot transmit existing data.

uint8_t u8fnIsDSPIBusy

(

uint8_t

u8Instance

)

returns DSPI_BUSY_WITH_PREVIOUS_TX based on the state of HW bit SPI HALT

Parameters:

u8Instance,:

0 - 3, depending on which SPI instance will be used.

Returns:

u8Status: DSPI_BUSY_WITH_PREVIOUS_TX if busy, 0 otherwise.

void vfnDSPI0EOQIsr

(

void

)

DSPI0's interrupt vector for the End-ofQue flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI0FUFISR

(

void

)

DSPI0's interrupt vector for the FUF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI0RFDFIsr

(

void

)

DSPI0's interrupt vector for the RFDF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI0TCFIsr

(

void

)

DSPI0's interrupt vector for the Transmission Complete flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI0TFFFIsr

(

void

)

DSPI0's interrupt vector for the TFFF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI1EOQIsr

(

void

)

DSPI1's interrupt vector for the End-ofQue flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI1FUFISR

(

void

)

DSPI1's interrupt vector for the FUF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI1RFDFIsr

(

void

)

DSPI1's interrupt vector for the RFDF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI1TCFIsr

(

void

)

DSPI1's interrupt vector for the Transmission Complete flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI1TFFFIsr

(

void

)

DSPI1's interrupt vector for the TFFF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI2EOQIsr

(

void

)

DSPI2's interrupt vector for the End-ofQue flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI2FUFISR

(

void

)

DSPI2's interrupt vector for the FUF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI2RFDFIsr

(

void

)

DSPI2's interrupt vector for the RFDF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI2TCFIsr

(

void

)

DSPI2's interrupt vector for the Transmission Complete flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI2TFFFIsr

(

void

)

DSPI2's interrupt vector for the TFFF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI3EOQIsr

(

void

)

DSPI3's interrupt vector for the End-ofQue flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI3FUFISR

(

void

)

DSPI3's interrupt vector for the FUF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI3RFDFIsr

(

void

)

DSPI3's interrupt vector for the RFDF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI3TCFIsr

(

void

)

DSPI3's interrupt vector for the Transmission Complete flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPI3TFFFIsr

(

void

)

DSPI3's interrupt vector for the TFFF flag. It calls a generic routine.

Parameters:

void.

Returns:

void.

void vfnDSPIEnable	(	const DSPIInstance_t	tMyInstance,
		const uint8_t	u8CSEnable,
		const uint8_t	u8Start
	)

Enables or disables a particular DSPI transmission. used by u8fnDSPITranscieve.

Parameters:

tMyInstance,:	Structure with Instance and configuration to be used.
u8CSEnable,:	Selects which Chip Select will be used. Bit dependant: BIT0 = CS0, BIT1 = CS1 and so on...
u8Start,:	Enables the transmission/reception if non-zero, otherwise disables it.

Returns:

void.

---

Variable Documentation

const DSPI_t catDSPIInstances[N_DSPI_INSTANCES]

List of pointers to each instance initial memory location

const uint8_t cau8DSPIInstances[N_DSPI_INSTANCES *N_DSPI_PRESETS]

List of all instances and preset configurations available

vuint8_t gau8DSPIBuffSize[N_DSPI_INSTANCES]

Size of buffer to transmit (per instance)

vuint8_t gau8DSPIRxFIFOIsEnabled[N_DSPI_INSTANCES]

Flag to determine if DSPI's hardware FIFO is being used or not (Rx)

vuint8_t gau8DSPITransferSize[N_DSPI_INSTANCES]

Size of word to transmit per instance (16 or 8-bit)

vuint8_t gau8DSPITxFIFOIsEnabled[N_DSPI_INSTANCES]

Flag to determine if DSPI's hardware FIFO is being used or not (Tx)

vuint8_t gau8DSPIWordsRx[N_DSPI_INSTANCES]

Number of words received (per instance)

vuint16_t* gpu16DSPIRxBuffer[N_DSPI_INSTANCES]

Globals for 16-bit transfers (Rx)

vuint16_t* gpu16DSPITxBuffer[N_DSPI_INSTANCES]

Globals for 16-bit transfers (Tx)

vuint8_t* gpu8DSPIRxBuffer[N_DSPI_INSTANCES]

Globals for 8-bit transfers (Rx)

vuint8_t* gpu8DSPITxBuffer[N_DSPI_INSTANCES]

Globals for 8-bit transfers (Tx)